1. Field of the Invention
The present invention relates to a resistive memory device, and more particularly, to a resistive memory device that has an increased contact area for switching while maintaining the integration density of the resistive memory device and a method of manufacturing the resistive memory device.
2. Description of the Related Art
A conventional semiconductor memory array includes a large number of unit memory cells that are electrically connected to one another. In the case of dynamic random access memory (DRAM), which is an example of semiconductor memory, a unit memory cell generally includes one switch and one capacitor. The DRAM has high integration density and high operation speed. However, when the power is turned off, stored data are erased. An example of non-volatile memory device is flash memory in which stored data are kept even when the power is turned off. The flash memory, unlike volatile memory, has non-volatile characteristics, however, has an integration density and an operation speed lower than the DRAM.
Many researches have been conducted regarding non-volatile memory devices such as magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase-change random access memory (PRAM), and resistance random access memory (RRAM). RRAM operates based on the variable resistance characteristics of a transition metal oxide according to states thereof.
FIG. 1A is a cross-sectional view of a conventional resistive memory device. Referring to FIG. 1A, a resistance layer 12 is formed on a lower electrode 11, and an upper electrode 13 is formed on the resistance layer 12. The resistance layer 12 is mainly formed of a transition metal oxide (TMO), and the lower electrode 11 and the upper electrode 13 are formed of a conductive material such as a metal or a metal oxide used for forming general semiconductor memory devices.
FIG. 1B is an I-V graph showing the operational characteristics of a conventional resistive memory device. The horizontal axis indicates the applied voltage, and the vertical axis indicates the current with respect to the applied voltage. Referring to FIG. 1B, when the magnitude of a voltage applied to the resistance layer 12 through the lower electrode 11 and the upper electrode 13 is gradually increased from 0V, the current increases proportionally to the voltage along line G1. However, when a voltage greater than V1 is applied, the resistance of the resistance layer 12 is greatly increased, and thus, the current is reduced. When a voltage between V1 and V2 is applied to the resistance layer 12, the current that flows to the resistance layer 12 is increased along line G2. When a voltage V3 greater than V2 is applied to the resistance layer 12, the resistance is suddenly reduced, and thus, the current follows the line G1. A reset current at which the graph changes from the line G1, which denotes a low resistance state (LRS), to the line G2, which denotes a high resistance state (HRS), that is, a current along the line G1 that corresponds to V1, reduces as the size of the unit cell is reduced. The reduction of reset current by reducing the size of the unit cell is desirable in view of power consumption and integration density.
However, in view of the integration density of a device, in a cross-point memory device, a select switch such as a transistor is essential and a two-step switch, which is advantageous for stacking, may be used. When a diode, which is an example of the two-step switch, is used, a large current density is required to switch the resistive memory device. In order to increase the switching current, an area of the diode that contacts the resistive memory device may be increased.
However, in order to increase the contact area between the diode and the memory device, the size of the memory device must be increased. In this case, the size of the memory device must be increased, thereby reducing the integration density of the memory device.
Therefore, there is a need to develop a resistive memory device having high integration density and increased switching current.